mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
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249 lines
8.2 KiB
C++
249 lines
8.2 KiB
C++
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/*
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* Copyright (c) 2019-2020 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hvisor_virtual_gic.hpp"
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namespace ams::hvisor {
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VirtualGic::VirqQueue::iterator VirtualGic::VirqQueue::insert(VirtualGic::VirqQueue::iterator pos, VirtualGic::VirqState &elem)
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{
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// Insert before
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ENSURE(!elem.IsQueued());
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// Empty list
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if (begin() == end()) {
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m_first = m_last = &elem;
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elem.listPrev = elem.listNext = virqListEndIndex;
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return begin();
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}
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if (pos == end()) {
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// Insert after last
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VirqState &prev = back();
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elem.listPrev = GetStateIndex(prev);
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elem.listNext = prev.listNext;
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prev.listNext = GetStateIndex(elem);
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m_last = &elem;
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} else {
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u32 idx = GetStateIndex(elem);
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u32 posidx = GetStateIndex(*pos);
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u32 previdx = elem.listPrev;
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elem.listNext = posidx;
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elem.listPrev = previdx;
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pos->listPrev = idx;
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if (pos == begin()) {
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m_first = &elem;
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} else {
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--pos;
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pos->listNext = idx;
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}
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}
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return iterator{&elem, m_storage};
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}
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VirtualGic::VirqQueue::iterator VirtualGic::VirqQueue::insert(VirtualGic::VirqState &elem)
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{
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// Insert in a stable sorted way
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// Lower priority number is higher; we sort by descending priority, ie. ascending priority number
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// Put the interrupts that were previously in the LR before the one which don't
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return insert(
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std::find_if(begin(), end(), [&a = elem](const VirqState &b) {
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return a.priority == b.priority ? a.handled && !b.handled : a.priority < b.priority;
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}),
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elem
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);
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}
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VirtualGic::VirqQueue::iterator VirtualGic::VirqQueue::erase(VirtualGic::VirqQueue::iterator startPos, VirtualGic::VirqQueue::iterator endPos)
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{
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VirqState &prev = m_storage[startPos->listPrev];
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VirqState &next = *endPos;
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u32 nextPos = GetStateIndex(*endPos);
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if (startPos->listPrev != virqListEndIndex) {
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prev.listNext = nextPos;
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} else {
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m_first = &next;
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}
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if (nextPos != virqListEndIndex) {
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next.listPrev = startPos->listPrev;
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} else {
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m_last = &prev;
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}
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for (auto it = startPos; it != endPos; ++it) {
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it->listPrev = it->listNext = virqListInvalidIndex;
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}
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}
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void VirtualGic::SetInterruptEnabledState(u32 id)
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{
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VirqState &state = GetVirqState(id);
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if (id < 16 || !IrqManager::IsGuestInterrupt(id) || state.enabled) {
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// Nothing to do...
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// Also, ignore for SGIs
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return;
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}
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// Similar effects to setting the target list to non-0 when it was 0...
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if (state.IsPending()) {
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NotifyOtherCoreList(state.targetList);
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}
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state.enabled = true;
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IrqManager::SetInterruptEnabled(id);
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}
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void VirtualGic::ClearInterruptEnabledState(u32 id)
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{
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VirqState &state = GetVirqState(id);
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if (id < 16 || !IrqManager::IsGuestInterrupt(id) || !state.enabled) {
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// Nothing to do...
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// Also, ignore for SGIs
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return;
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}
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// Similar effects to setting the target list to 0, we may need to notify the core
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// handling the interrupt if it's pending
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if (state.handled) {
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NotifyOtherCoreList(BIT(state.coreId));
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}
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state.enabled = false;
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IrqManager::ClearInterruptEnabled(id);
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}
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void VirtualGic::SetInterruptPriorityByte(u32 id, u8 priority)
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{
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if (!IrqManager::IsGuestInterrupt(id)) {
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return;
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}
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// 32 priority levels max, bits [7:3]
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priority >>= priorityShift;
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if (id >= 16) {
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// Ensure we have the correct priority on the physical distributor...
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IrqManager::GetInstance().SetInterruptPriority(id, IrqManager::guestPriority);
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}
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VirqState &state = GetVirqState(id);
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if (priority == state.priority) {
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// Nothing to do...
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return;
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}
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state.priority = priority;
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u32 targets = state.targetList;
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if (targets != 0 && state.IsPending()) {
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NotifyOtherCoreList(targets);
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}
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}
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void VirtualGic::SetInterruptTargets(u32 id, u8 coreList)
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{
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// Ignored for SGIs and PPIs, and non-guest interrupts
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if (id < 32 || !IrqManager::IsGuestInterrupt(id)) {
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return;
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}
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// Interrupt not pending (inactive or active-only): nothing much to do (see reference manual)
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// Otherwise, we may need to migrate the interrupt.
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// In our model, while a physical interrupt can be pending on multiple cores, we decide that a pending SPI
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// can only be handled on a single core (either it's in a LR, or in the global list), therefore we need to
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// send a signal to (oldList XOR newList) to either put the interrupt back in the global list or potentially handle it
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// Note that we take into account that the interrupt may be disabled.
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VirqState &state = GetVirqState(id);
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if (state.IsPending()) {
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u8 oldList = state.targetList;
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u8 diffList = (oldList ^ coreList) & getActiveCoreMask();
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if (diffList != 0) {
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NotifyOtherCoreList(diffList);
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}
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}
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state.targetList = coreList;
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IrqManager::SetInterruptTargets(id, state.targetList);
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}
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void VirtualGic::SetInterruptConfigBits(u32 id, u32 config)
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{
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// Ignored for SGIs, implementation defined for PPIs
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if (id < 32 || !IrqManager::IsGuestInterrupt(id)) {
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return;
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}
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VirqState &state = GetVirqState(id);
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// Expose bit(2n) as nonprogrammable to the guest no matter what the physical distributor actually behaves
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bool newLvl = ((config & 2) << GicV2Distributor::GetCfgrShift(id)) == 0;
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if (state.levelSensitive != newLvl) {
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state.levelSensitive = newLvl;
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IrqManager::SetInterruptMode(id, newLvl);
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}
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}
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void VirtualGic::SetSgiPendingState(u32 id, u32 coreId, u32 srcCoreId)
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{
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VirqState &state = GetVirqState(coreId, id);
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m_incomingSgiPendingSources[coreId][id] |= BIT(srcCoreId);
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if (!state.handled && !state.IsQueued()) {
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// The SGI was inactive on the target core...
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state.SetPending();
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state.srcCoreId = srcCoreId;
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m_incomingSgiPendingSources[coreId][id] &= ~BIT(srcCoreId);
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m_virqPendingQueue.insert(state);
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NotifyOtherCoreList(BIT(coreId));
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}
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}
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void VirtualGic::SendSgi(u32 id, GicV2Distributor::SgirTargetListFilter filter, u32 coreList)
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{
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switch (filter) {
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case GicV2Distributor::ForwardToTargetList:
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// Forward to coreList
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break;
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case GicV2Distributor::ForwardToAllOthers:
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// Forward to all but current core
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coreList = ~BIT(currentCoreCtx->coreId);
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break;
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case GicV2Distributor::ForwardToSelf:
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// Forward to current core only
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coreList = BIT(currentCoreCtx->coreId);
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break;
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default:
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DEBUG("Emulated GCID_SGIR: invalid TargetListFilter value!\n");
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return;
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}
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coreList &= getActiveCoreMask();
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for (u32 dstCore: util::BitsOf{coreList}) {
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SetSgiPendingState(id, dstCore, currentCoreCtx->coreId);
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}
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}
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}
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