2019-07-17 00:49:47 +01:00
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/*
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* Copyright (c) 2019 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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2019-07-18 22:43:49 +01:00
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.section .crt0, "ax", %progbits
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2019-07-17 00:49:47 +01:00
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.align 3
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.global _start
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.type _start, %function
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_start:
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2019-07-17 22:54:31 +01:00
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b start
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2019-07-29 00:25:50 +01:00
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b start2
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2019-07-17 22:54:31 +01:00
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2019-07-29 00:25:50 +01:00
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_initialKernelEntrypoint:
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2019-07-17 22:54:31 +01:00
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.quad 0
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start:
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2019-07-29 00:25:50 +01:00
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mov x19, #1
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b _startCommon
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start2:
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2019-07-30 20:13:38 +01:00
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mov x19, xzr
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2019-07-29 00:25:50 +01:00
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_startCommon:
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2019-07-22 00:04:53 +01:00
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// Disable interrupts, select sp_el2
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2019-07-17 00:49:47 +01:00
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msr daifset, 0b1111
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2019-07-22 00:04:53 +01:00
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msr spsel, #1
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2019-07-17 00:49:47 +01:00
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2019-07-29 21:38:44 +01:00
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// Set VBAR
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2019-07-30 20:13:38 +01:00
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adrp x8, __vectors_start__
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add x8, x8, #:lo12:__vectors_start__
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2019-07-29 21:38:44 +01:00
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msr vbar_el2, x8
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// Set system to sane defaults, aarch64 for el1
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mov x4, #0x0838
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movk x4, #0xC5, lsl #16
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orr x1, x4, #0x30000000
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mov x2, #(1 << 31)
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mov x3, #0xFFFFFFFF
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msr sctlr_el2, x1
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msr hcr_el2, x2
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msr dacr32_el2, x3
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2019-07-30 20:13:38 +01:00
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msr sctlr_el1, x4
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2019-07-29 21:38:44 +01:00
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dsb sy
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isb
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2019-07-29 00:25:50 +01:00
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// Get core ID
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2019-07-29 21:38:44 +01:00
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mrs x10, mpidr_el1
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and x10, x10, #0xFF
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2019-07-18 22:43:49 +01:00
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2019-07-30 20:13:38 +01:00
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// Set tmp stack (__stacks_top__ is aligned)
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adrp x8, __stacks_top__
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2019-07-29 21:38:44 +01:00
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lsl x9, x10, #10
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sub sp, x8, x9
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2019-07-29 00:25:50 +01:00
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// Set up x18
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adrp x18, g_coreCtxs
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add x18, x18, #:lo12:g_coreCtxs
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2019-07-30 01:16:25 +01:00
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add x18, x18, x10, lsl #3
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2019-07-29 00:25:50 +01:00
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stp x18, xzr, [sp, #-0x10]!
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// Store entrypoint if first core
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cbz x19, _store_arg
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ldr x8, _initialKernelEntrypoint
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str x8, [x18, #8]
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_store_arg:
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str x0, [x18, #0]
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2019-07-17 22:54:31 +01:00
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2019-07-17 00:49:47 +01:00
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// Don't call init array to save space?
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2019-07-29 00:25:50 +01:00
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// Clear BSS & call main for the first core executing this code
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2019-07-30 01:16:25 +01:00
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cbz x19, _jump_to_main
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2019-07-30 20:13:38 +01:00
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adrp x0, __bss_start__
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add x0, x0, #:lo12:__bss_start__
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mov w1, wzr
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adrp x2, __end__
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add x2, x2, #:lo12:__end__
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2019-07-17 00:49:47 +01:00
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sub x2, x2, x0
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bl memset
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2019-07-30 20:13:38 +01:00
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_jump_to_main:
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2019-07-29 21:38:44 +01:00
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dsb sy
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isb
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2019-07-18 22:43:49 +01:00
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bl main
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2019-07-17 22:54:31 +01:00
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// Jump to kernel
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2019-07-29 00:25:50 +01:00
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mov x8, #(0b1111 << 6 | 0b0101) // EL1h+DAIF
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msr spsr_el2, x8
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ldp x0, x1, [x18]
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msr elr_el2, x1
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2019-07-18 22:43:49 +01:00
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dsb sy
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isb
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2019-07-17 22:54:31 +01:00
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eret
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2019-07-17 00:49:47 +01:00
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.pool
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