2018-03-02 06:50:00 +00:00
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#ifndef EXOSPHERE_CLOCK_AND_RESET_H
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#define EXOSPHERE_CLOCK_AND_RESET_H
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#include <stdint.h>
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#include "memory_map.h"
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/* Exosphere Driver for the Tegra X1 Clock and Reset registers. */
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#define CAR_BASE (MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_CLKRST))
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2018-03-03 19:23:13 +00:00
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#define MAKE_CAR_REG(n) MAKE_REG32(CAR_BASE + n)
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2018-03-02 06:50:00 +00:00
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2018-03-02 07:33:43 +00:00
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#define CLK_RST_CONTROLLER_MISC_CLK_ENB_0 MAKE_CAR_REG(0x048)
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#define CLK_RST_CONTROLLER_RST_DEVICES_H_0 MAKE_CAR_REG(0x008)
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2018-03-02 21:44:21 +00:00
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#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD_0 MAKE_CAR_REG(0x3A4)
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2018-03-02 07:33:43 +00:00
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2018-03-02 06:50:00 +00:00
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#define NUM_CAR_BANKS 7
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typedef enum {
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CARDEVICE_UARTA = 6,
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CARDEVICE_UARTB = 7,
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CARDEVICE_I2C1 = 12,
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CARDEVICE_I2C5 = 47,
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2018-03-25 22:05:08 +01:00
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CARDEVICE_ACTMON = 119,
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2018-03-02 06:50:00 +00:00
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CARDEVICE_BPMP = 1
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2018-03-05 22:59:46 +00:00
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} CarDevice;
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2018-03-02 06:50:00 +00:00
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2018-03-05 22:59:46 +00:00
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void clk_enable(CarDevice dev);
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void clk_disable(CarDevice dev);
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void rst_enable(CarDevice dev);
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void rst_disable(CarDevice dev);
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2018-03-02 06:50:00 +00:00
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2018-03-05 22:59:46 +00:00
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void clkrst_enable(CarDevice dev);
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void clkrst_disable(CarDevice dev);
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2018-03-02 06:50:00 +00:00
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2018-03-05 22:59:46 +00:00
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void clkrst_reboot(CarDevice dev);
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2018-03-02 06:50:00 +00:00
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2018-03-03 19:23:13 +00:00
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#endif
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