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fusee: Minor hardware configuration fixes.
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parent
ac391d9c5e
commit
6e7eb47d33
3 changed files with 12 additions and 3 deletions
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@ -234,7 +234,7 @@ void nx_hwinit()
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/* Reboot SE. */
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/* NOTE: [4.0.0+] This was removed. */
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clkrst_reboot(CARDEVICE_SE);
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/* clkrst_reboot(CARDEVICE_SE); */
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/* Reboot unknown device. */
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clkrst_reboot(CARDEVICE_UNK);
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@ -160,7 +160,9 @@ void mc_enable()
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car->clk_enb_x_set = ((car->clk_enb_x_set & 0xFFFFBFFF) | 0x4000);
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/* Clear EMC and MC reset. */
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car->rst_dev_h_set = 0x2000001;
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/* NOTE: [4.0.0+] This was changed to use the right register. */
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/* car->rst_dev_h_set = 0x2000001; */
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car->rst_dev_h_clr = 0x2000001;
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udelay(5);
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mc_disable_ahb_redirect();
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@ -22,6 +22,7 @@
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#include "sysreg.h"
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#include "i2c.h"
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#include "car.h"
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#include "mc.h"
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#include "timers.h"
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#include "pmc.h"
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#include "max77620.h"
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@ -141,6 +142,10 @@ void cluster_boot_cpu0(uint32_t entry)
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SB_CSR_0 = 2;
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(void)SB_CSR_0;
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/* Set CPU_STRICT_TZ_APERTURE_CHECK. */
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/* NOTE: [4.0.0+] This was added, but it breaks Exosphère. */
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/* MAKE_MC_REG(MC_TZ_SECURITY_CTRL) = 1; */
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/* Clear MSELECT reset. */
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car->rst_dev_v &= 0xFFFFFFF7;
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@ -148,5 +153,7 @@ void cluster_boot_cpu0(uint32_t entry)
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car->rst_cpug_cmplx_clr = 0x20000000;
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/* Clear CPU{0,1,2,3} POR and CORE, CX0, L2, and DBG reset.*/
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car->rst_cpug_cmplx_clr = 0x411F000F;
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/* NOTE: [5.0.0+] This was changed so only CPU0 reset is cleared. */
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/* car->rst_cpug_cmplx_clr = 0x411F000F; */
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car->rst_cpug_cmplx_clr = 0x41010001;
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}
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