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Author SHA1 Message Date
TuxSH
36ca87491d thermosphere: gdb/debug: avoid pause/unpause race condition in vCont + bugfix 2021-02-19 21:52:00 +00:00
TuxSH
9ef2532b9d thermosphere: gdb: fix parsing errors in vCont and hex decode 2021-02-19 21:52:00 +00:00
TuxSH
cbf3b305ca thermosphere: gdb add break & vCont handling 2021-02-19 21:52:00 +00:00
TuxSH
c0252e07f6 thermosphere: GDB_TrySignalDebugEvent, do nothing if not attached 2021-02-19 21:51:59 +00:00
TuxSH
71401b0731 thermosphere: add structural changes needed for range step 2021-02-19 21:51:59 +00:00
TuxSH
ff1aac0ab5 thermosphere: resend debug event if not handled 2021-02-19 21:51:59 +00:00
TuxSH
984f6776c6 thermosphere: impl. debug event dispatching, vStopped, "?" 2021-02-19 21:51:58 +00:00
TuxSH
0e47f7f46b thermosphere: debug manager wip 2021-02-19 21:51:58 +00:00
TuxSH
c00672654a thermosphere: gdb: remove server, rewrite data processing in gdb/context and gdb/net 2021-02-19 21:51:58 +00:00
TuxSH
8538fed043 thermosphere: optimize barrier and core_ctx 2021-02-19 21:51:57 +00:00
TuxSH
1f2b8e7918 thermopshere: add spinlock try lock 2021-02-19 21:51:57 +00:00
TuxSH
30a4a0d4c1 thermosphere: rewrite gdb/reg 2021-02-19 21:51:57 +00:00
TuxSH
97c4595a3a thermosphere: rework fpu register handling 2021-02-19 21:51:56 +00:00
TuxSH
5b545f89f5 thermosphere: introduce "ENSURE" 2021-02-19 21:51:56 +00:00
TuxSH
310048a32c thermosphere: small spinlock improvements 2021-02-19 21:51:56 +00:00
TuxSH
5473443057 thermosphere: refactor gdb/thread 2021-02-19 21:51:55 +00:00
TuxSH
78723164c1 thermosphere: gdb: target xml + various refactoring 2021-02-19 21:51:55 +00:00
TuxSH
58d52675cd thermosphere: rewrite gdb/mem 2021-02-19 21:51:55 +00:00
TuxSH
bd36796d5f thermosphere: gdb/net: reduce stack/memory usage by using memmove 2021-02-19 21:51:54 +00:00
TuxSH
779aeaa538 thermopshere: gdb: rewrite stop point handling 2021-02-19 21:51:54 +00:00
TuxSH
5de05ed8a8 thermosphere: retrieve wp direction 2021-02-19 21:51:54 +00:00
TuxSH
abeaa72f94 thermosphere: some gdb/debug refactor 2021-02-19 21:51:53 +00:00
TuxSH
c89ce085a6 thermopshère: rewrite some gdb/net functions 2021-02-19 21:51:53 +00:00
TuxSH
418cabbd53 thermosphere: add esr_el2 to exception frame 2021-02-19 21:51:53 +00:00
TuxSH
744491ca33 thermosphere: allow each core to pause itself in a lock-free manner & fix bugs 2021-02-19 21:51:52 +00:00
TuxSH
9ebf3c9580 thermosphere: wip gdb 2021-02-19 21:51:52 +00:00
TuxSH
f23fb45956 thermosphere: copy paste lots of gdb luma files (but don't build them yet) 2021-02-19 21:51:51 +00:00
TuxSH
61fec56c6e thermosphere: minor changes 2021-02-19 21:51:51 +00:00
TuxSH
a665f49b93 thermosphere: incl pattern utils 2021-02-19 21:51:51 +00:00
TuxSH
3e8bd764d5 thermosphere: unfuck sw breakpoint logic 2021-02-19 21:51:51 +00:00
TuxSH
c64ccd86ee thermosphere: uninline recursive lock funcs 2021-02-19 21:51:50 +00:00
TuxSH
217c1ad054 thermosphere: implement reading and writing guest memory 2021-02-19 21:51:50 +00:00
TuxSH
0f0228e240 thermosphere: we expose a GICv2, not a GICv1 2021-02-19 21:51:49 +00:00
TuxSH
3ca3e094fe thermosphere: use ish instead of sy in most places 2021-02-19 21:51:49 +00:00
TuxSH
d1cd17a9df thermosphere: fix fmt.c "l" handling 2021-02-19 21:51:49 +00:00
TuxSH
626f0ecb98 thermosphere: major refactor of memory map 
- use recursive stage 1 page table (thanks @fincs for this idea)
- NULL now unmapped
- no identity mapping
- image + GICv2 now mapped at the same address for every platform
- tempbss mapped just after "real" bss, can now steal unused mem from
the latter
- no hardcoded VAs for other MMIO devices
- tegra: remove timers, use the generic timer instead
 2021-02-19 21:51:48 +00:00
TuxSH
92a291cd41 thermosphere: disable interrupts in debugPauseCores 2021-02-19 21:51:48 +00:00
TuxSH
906d6a4f20 thermosphere: rewrite debug pause & fix single step state machine 2021-02-19 21:51:48 +00:00
TuxSH
6b8a843ffb thermosphere: trap set/way dcache access 
note: qemu does not implement the trap
 2021-02-19 21:51:47 +00:00
TuxSH
72d1992eec thermosphere: use barriers and caches *properly*. Cache code refactoring 
- set/way cache ops create losses of coherency, do not broadcast and are only meant to be used on boot, period.

Cache ops by VA are **the only way** to do data cache maintenance.

Fix a bug where the L2 cache was evicted by each core. It shouldn't have.

- Cleaning dcache to PoU and invalidating icache to PoU, by VA is sufficient for self-modifying code

- Since we operate within a single cluster and don't do DMA, we almost always operate within the inner shareability domain

(commit untested on real hw)
 2021-02-19 21:51:47 +00:00
TuxSH
1369697058 thermosphere: add debug pause logic 2021-02-19 21:51:47 +00:00
TuxSH
b6a130547a thermosphere: add common asm macros 2021-02-19 21:51:46 +00:00
TuxSH
067770334e thermosphere: add fpu regs save/restore 2021-02-19 21:51:46 +00:00
TuxSH
a7741c8576 thermosphere: add cctx->userFrame 2021-02-19 21:51:46 +00:00
TuxSH
dd96c8b32b thermosphere: fix ptimer time freezing (again) 2021-02-19 21:51:45 +00:00
TuxSH
68a1ce6dd2 thermosphere: properly implement guest timer stuff 2021-02-19 21:51:45 +00:00
TuxSH
388c245ce4 thermosphere: add TransportInterface abstraction layer 2021-02-19 21:51:45 +00:00
TuxSH
1086c0612c thermosphere: refactor tegra uart code, etc. 2021-02-19 21:51:44 +00:00
TuxSH
8dc9be9f8e thermosphere: pl011 uart refactor 2021-02-19 21:51:44 +00:00
TuxSH
018260645a thermosphere: fix pl101 uart reg definitions 2021-02-19 21:51:44 +00:00