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https://github.com/suchmememanyskill/TegraExplorer.git
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Revert changes on loader
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parent
8a568e42ba
commit
917291374c
3 changed files with 20 additions and 61 deletions
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@ -7,10 +7,6 @@ include $(DEVKITARM)/base_rules
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################################################################################
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LDR_LOAD_ADDR := 0x40007000
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IPL_MAGIC := 0x43544349 #"ICTC"
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LPVERSION_MAJOR := 4
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LPVERSION_MINOR := 0
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LPVERSION_BUGFX := 1
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################################################################################
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@ -32,7 +28,7 @@ CUSTOMDEFINES := -DBL_MAGIC=$(IPL_MAGIC)
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CUSTOMDEFINES += -DBL_VER_MJ=$(BLVERSION_MAJOR) -DBL_VER_MN=$(BLVERSION_MINOR) -DBL_VER_HF=$(BLVERSION_HOTFX) -DBL_RESERVED=$(BLVERSION_RSVD)
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#TODO: Considering reinstating some of these when pointer warnings have been fixed.
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WARNINGS := -Wall -Wsign-compare -Wno-array-bounds -Wno-stringop-overflow
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WARNINGS := -Wall -Wno-array-bounds -Wno-stringop-overflow
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ARCH := -march=armv4t -mtune=arm7tdmi -mthumb-interwork
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CFLAGS = $(ARCH) -O2 -g -nostdlib -ffunction-sections -fdata-sections -fomit-frame-pointer -std=gnu11 $(WARNINGS) $(CUSTOMDEFINES)
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@ -6,8 +6,6 @@ SECTIONS {
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.text : {
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*(.text._start);
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KEEP(*(._boot_cfg));
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KEEP(*(._ipl_version));
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KEEP(*(._octopus));
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*(.text*);
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}
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.data : {
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@ -15,14 +13,6 @@ SECTIONS {
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*(.rodata*);
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*(._payload_00);
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*(._payload_01);
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/*
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* To mitigate bad injectors/chainloaders,
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* miss-align binary size to account for version info.
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* !If version text is not appended, then use ". = ALIGN(4)"!
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*/
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data_end_ua = .;
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. = ((data_end_ua + 0x6 + 4 - 1) & ~(4 - 1)) - 6;
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}
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__ldr_end = .;
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. = ALIGN(0x10);
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@ -30,70 +30,43 @@
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#define IPL_PATCHED_RELOC_SZ 0x94
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boot_cfg_t __attribute__((section ("._boot_cfg"))) b_cfg;
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const volatile ipl_ver_meta_t __attribute__((section ("._ipl_version"))) ipl_ver = {
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.magic = BL_MAGIC,
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.version = (BL_VER_MJ + '0') | ((BL_VER_MN + '0') << 8) | ((BL_VER_HF + '0') << 16),
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.rsvd0 = 0,
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.rsvd1 = 0
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};
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const volatile char __attribute__((section ("._octopus"))) octopus[] =
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"\n"
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" ___\n"
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" .-' `'.\n"
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" / \\\n"
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" | ;\n"
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" | | ___.--,\n"
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" _.._ |0) = (0) | _.---'`__.-( (_.\n"
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" __.--'`_.. '.__.\\ '--. \\_.-' ,.--'` `\"\"`\n"
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" ( ,.--'` ',__ /./; ;, '.__.'` __\n"
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" _`) ) .---.__.' / | |\\ \\__..--\"\" \"\"\"--.,_\n"
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" `---' .'.''-._.-'`_./ /\\ '. \\ _.--''````'''--._`-.__.'\n"
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" | | .' _.-' | | \\ \\ '. `----`\n"
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" \\ \\/ .' \\ \\ '. '-._)\n"
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" \\/ / \\ \\ `=.__`'-.\n"
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" / /\\ `) ) / / `\"\".`\\\n"
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" , _.-'.'\\ \\ / / ( ( / /\n"
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" `--'` ) ) .-'.' '.'. | (\n"
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" (/` ( (` ) ) '-; [switchbrew]\n";
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void loader_main()
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{
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// Preliminary BPMP clocks init.
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CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 0x10; // Set HCLK div to 2 and PCLK div to 1.
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CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SYS) = 0; // Set SCLK div to 1.
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CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20004444; // Set clk source to Run and PLLP_OUT2 (204MHz).
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CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 0x10; // Set HCLK div to 2 and PCLK div to 1.
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CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SYS) = 0; // Set SCLK div to 1.
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CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20004444; // Set clk source to Run and PLLP_OUT2 (204MHz).
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CLOCK(CLK_RST_CONTROLLER_SUPER_SCLK_DIVIDER) = 0x80000000; // Enable SUPER_SDIV to 1.
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CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 2; // Set HCLK div to 1 and PCLK div to 3.
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CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003333; // Set SCLK to PLLP_OUT (408MHz).
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CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 2; // Set HCLK div to 1 and PCLK div to 3.
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CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003333; // Set SCLK to PLLP_OUT (408MHz).
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// Get Payload size.
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u32 payload_size = sizeof(payload_00) + sizeof(payload_01); // Actual payload size.
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payload_size += (u32)payload_01 - (u32)payload_00 - sizeof(payload_00); // Add compiler alignment.
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payload_size = ALIGN(payload_size, 4); // Align size to 4 bytes.
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// Get Loader and Payload size.
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u32 payload_size = sizeof(payload_00) + sizeof(payload_01); // Actual payload size.
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payload_size += (u32)payload_01 - (u32)payload_00 - sizeof(payload_00); // Add array alignment.
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u32 *payload_addr = (u32 *)payload_00;
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// Relocate payload to a safer place.
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u32 words = payload_size >> 2;
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u32 *src = payload_addr + words - 1;
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u32 *dst = (u32 *)(IPL_RELOC_TOP - 4);
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while (words)
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u32 bytes = ALIGN(payload_size, 4) >> 2;
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u32 *addr = payload_addr + bytes - 1;
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u32 *dst = (u32 *)(IPL_RELOC_TOP - 4);
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while (bytes)
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{
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*dst = *src;
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src--;
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*dst = *addr;
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dst--;
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words--;
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addr--;
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bytes--;
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}
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// Set source address of the first part.
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u8 *src_addr = (void *)(IPL_RELOC_TOP - payload_size);
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u8 *src_addr = (void *)(IPL_RELOC_TOP - ALIGN(payload_size, 4));
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// Uncompress first part.
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u32 dst_pos = LZ_Uncompress((const u8 *)src_addr, (u8 *)IPL_LOAD_ADDR, sizeof(payload_00));
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u32 dst_pos = LZ_Uncompress((const u8 *)src_addr, (u8*)IPL_LOAD_ADDR, sizeof(payload_00));
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// Set source address of the second part. Includes compiler alignment.
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// Set source address of the second part. Includes array alignment.
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src_addr += (u32)payload_01 - (u32)payload_00;
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// Uncompress second part.
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LZ_Uncompress((const u8 *)src_addr, (u8 *)IPL_LOAD_ADDR + dst_pos, sizeof(payload_01));
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LZ_Uncompress((const u8 *)src_addr, (u8*)IPL_LOAD_ADDR + dst_pos, sizeof(payload_01));
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// Copy over boot configuration storage.
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memcpy((u8 *)(IPL_LOAD_ADDR + IPL_PATCHED_RELOC_SZ), &b_cfg, sizeof(boot_cfg_t));
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