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Code Issues Releases Activity

Revert changes on loader

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suchmememanyskill 2023-07-29 00:12:12 +02:00
parent 8a568e42ba
commit 917291374c
3 changed files with 20 additions and 61 deletions
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6
loader/Makefile
View file

@ -7,10 +7,6 @@ include $(DEVKITARM)/base_rules
################################################################################ ################################################################################
LDR_LOAD_ADDR := 0x40007000 LDR_LOAD_ADDR := 0x40007000
IPL_MAGIC := 0x43544349 #"ICTC"
LPVERSION_MAJOR := 4
LPVERSION_MINOR := 0
LPVERSION_BUGFX := 1
################################################################################ ################################################################################
@ -32,7 +28,7 @@ CUSTOMDEFINES := -DBL_MAGIC=$(IPL_MAGIC)
CUSTOMDEFINES += -DBL_VER_MJ=$(BLVERSION_MAJOR) -DBL_VER_MN=$(BLVERSION_MINOR) -DBL_VER_HF=$(BLVERSION_HOTFX) -DBL_RESERVED=$(BLVERSION_RSVD) CUSTOMDEFINES += -DBL_VER_MJ=$(BLVERSION_MAJOR) -DBL_VER_MN=$(BLVERSION_MINOR) -DBL_VER_HF=$(BLVERSION_HOTFX) -DBL_RESERVED=$(BLVERSION_RSVD)
#TODO: Considering reinstating some of these when pointer warnings have been fixed. #TODO: Considering reinstating some of these when pointer warnings have been fixed.
WARNINGS := -Wall -Wsign-compare -Wno-array-bounds -Wno-stringop-overflow WARNINGS := -Wall -Wno-array-bounds -Wno-stringop-overflow
ARCH := -march=armv4t -mtune=arm7tdmi -mthumb-interwork ARCH := -march=armv4t -mtune=arm7tdmi -mthumb-interwork
CFLAGS = $(ARCH) -O2 -g -nostdlib -ffunction-sections -fdata-sections -fomit-frame-pointer -std=gnu11 $(WARNINGS) $(CUSTOMDEFINES) CFLAGS = $(ARCH) -O2 -g -nostdlib -ffunction-sections -fdata-sections -fomit-frame-pointer -std=gnu11 $(WARNINGS) $(CUSTOMDEFINES)

10
loader/link.ld
View file

@ -6,8 +6,6 @@ SECTIONS {
.text : { .text : {
*(.text._start); *(.text._start);
KEEP(*(._boot_cfg)); KEEP(*(._boot_cfg));
KEEP(*(._ipl_version));
KEEP(*(._octopus));
*(.text*); *(.text*);
} }
.data : { .data : {
@ -15,14 +13,6 @@ SECTIONS {
*(.rodata*); *(.rodata*);
*(._payload_00); *(._payload_00);
*(._payload_01); *(._payload_01);
/*
* To mitigate bad injectors/chainloaders,
* miss-align binary size to account for version info.
* !If version text is not appended, then use ". = ALIGN(4)"!
*/
data_end_ua = .;
. = ((data_end_ua + 0x6 + 4 - 1) & ~(4 - 1)) - 6;
} }
__ldr_end = .; __ldr_end = .;
. = ALIGN(0x10); . = ALIGN(0x10);

65
loader/loader.c
View file

@ -30,70 +30,43 @@
#define IPL_PATCHED_RELOC_SZ 0x94 #define IPL_PATCHED_RELOC_SZ 0x94
boot_cfg_t __attribute__((section ("._boot_cfg"))) b_cfg; boot_cfg_t __attribute__((section ("._boot_cfg"))) b_cfg;
const volatile ipl_ver_meta_t __attribute__((section ("._ipl_version"))) ipl_ver = {
.magic = BL_MAGIC,
.version = (BL_VER_MJ + '0') | ((BL_VER_MN + '0') << 8) | ((BL_VER_HF + '0') << 16),
.rsvd0 = 0,
.rsvd1 = 0
};
const volatile char __attribute__((section ("._octopus"))) octopus[] =
"\n"
" ___\n"
" .-' `'.\n"
" / \\\n"
" | ;\n"
" | | ___.--,\n"
" _.._ |0) = (0) | _.---'`__.-( (_.\n"
" __.--'`_.. '.__.\\ '--. \\_.-' ,.--'` `\"\"`\n"
" ( ,.--'` ',__ /./; ;, '.__.'` __\n"
" _`) ) .---.__.' / | |\\ \\__..--\"\" \"\"\"--.,_\n"
" `---' .'.''-._.-'`_./ /\\ '. \\ _.--''````'''--._`-.__.'\n"
" | | .' _.-' | | \\ \\ '. `----`\n"
" \\ \\/ .' \\ \\ '. '-._)\n"
" \\/ / \\ \\ `=.__`'-.\n"
" / /\\ `) ) / / `\"\".`\\\n"
" , _.-'.'\\ \\ / / ( ( / /\n"
" `--'` ) ) .-'.' '.'. | (\n"
" (/` ( (` ) ) '-; [switchbrew]\n";
void loader_main() void loader_main()
{ {
// Preliminary BPMP clocks init. // Preliminary BPMP clocks init.
CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 0x10; // Set HCLK div to 2 and PCLK div to 1. CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 0x10; // Set HCLK div to 2 and PCLK div to 1.
CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SYS) = 0; // Set SCLK div to 1. CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SYS) = 0; // Set SCLK div to 1.
CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20004444; // Set clk source to Run and PLLP_OUT2 (204MHz). CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20004444; // Set clk source to Run and PLLP_OUT2 (204MHz).
CLOCK(CLK_RST_CONTROLLER_SUPER_SCLK_DIVIDER) = 0x80000000; // Enable SUPER_SDIV to 1. CLOCK(CLK_RST_CONTROLLER_SUPER_SCLK_DIVIDER) = 0x80000000; // Enable SUPER_SDIV to 1.
CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 2; // Set HCLK div to 1 and PCLK div to 3. CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 2; // Set HCLK div to 1 and PCLK div to 3.
CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003333; // Set SCLK to PLLP_OUT (408MHz). CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20003333; // Set SCLK to PLLP_OUT (408MHz).
// Get Payload size. // Get Loader and Payload size.
u32 payload_size = sizeof(payload_00) + sizeof(payload_01); // Actual payload size. u32 payload_size = sizeof(payload_00) + sizeof(payload_01); // Actual payload size.
payload_size += (u32)payload_01 - (u32)payload_00 - sizeof(payload_00); // Add compiler alignment. payload_size += (u32)payload_01 - (u32)payload_00 - sizeof(payload_00); // Add array alignment.
payload_size = ALIGN(payload_size, 4); // Align size to 4 bytes.
u32 *payload_addr = (u32 *)payload_00; u32 *payload_addr = (u32 *)payload_00;
// Relocate payload to a safer place. // Relocate payload to a safer place.
u32 words = payload_size >> 2; u32 bytes = ALIGN(payload_size, 4) >> 2;
u32 *src = payload_addr + words - 1; u32 *addr = payload_addr + bytes - 1;
u32 *dst = (u32 *)(IPL_RELOC_TOP - 4); u32 *dst = (u32 *)(IPL_RELOC_TOP - 4);
while (words) while (bytes)
{ {
*dst = *src; *dst = *addr;
src--;
dst--; dst--;
words--; addr--;
bytes--;
} }
// Set source address of the first part. // Set source address of the first part.
u8 *src_addr = (void *)(IPL_RELOC_TOP - payload_size); u8 *src_addr = (void *)(IPL_RELOC_TOP - ALIGN(payload_size, 4));
// Uncompress first part. // Uncompress first part.
u32 dst_pos = LZ_Uncompress((const u8 *)src_addr, (u8 *)IPL_LOAD_ADDR, sizeof(payload_00)); u32 dst_pos = LZ_Uncompress((const u8 *)src_addr, (u8*)IPL_LOAD_ADDR, sizeof(payload_00));
// Set source address of the second part. Includes compiler alignment. // Set source address of the second part. Includes array alignment.
src_addr += (u32)payload_01 - (u32)payload_00; src_addr += (u32)payload_01 - (u32)payload_00;
// Uncompress second part. // Uncompress second part.
LZ_Uncompress((const u8 *)src_addr, (u8 *)IPL_LOAD_ADDR + dst_pos, sizeof(payload_01)); LZ_Uncompress((const u8 *)src_addr, (u8*)IPL_LOAD_ADDR + dst_pos, sizeof(payload_01));
// Copy over boot configuration storage. // Copy over boot configuration storage.
memcpy((u8 *)(IPL_LOAD_ADDR + IPL_PATCHED_RELOC_SZ), &b_cfg, sizeof(boot_cfg_t)); memcpy((u8 *)(IPL_LOAD_ADDR + IPL_PATCHED_RELOC_SZ), &b_cfg, sizeof(boot_cfg_t));