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14 commits

Author SHA1 Message Date
CTCaer
63768ccc99 uart: Add rounded clocking for 1 mbaud 2020-04-30 03:34:05 +03:00
CTCaer
51985ed2ca sdmmc v2: Bus/IO clock refactoring and fixes
Use the exact same clocks with HOS and utilize low jitter clock parents.

Add back our compatibility mode and the missing timeout clock parent.

Hekate main will continue to use PLLP clock parent for all.
2020-04-30 01:26:55 +03:00
CTCaer
f5040f1e41 Update and add missing copyrights
Probably more need to change.
2020-03-14 09:24:24 +02:00
CTCaer
c99a87dd09 clock: Move PLLC config from bpmp.c to clock.c 2020-01-07 06:46:22 +02:00
CTCaer
009db77426 bpmp: Switch to PLLC for SCLK/BPMP clock source 2020-01-07 06:26:29 +02:00
CTCaer
0b1eebefe1 Small refactor and bugfixes 2019-12-04 21:31:39 +02:00
CTCaer
a8d529cf6a Refactoring and comment adding 2019-09-12 23:08:38 +03:00
Kostas Missos
718e502983 Add more register names + refactoring 2019-09-09 16:56:37 +03:00
ctcaer@gmail.com
8101fd3f7f Various bugfixes 2019-06-30 03:15:46 +03:00
Kostas Missos
4eb5b5f91b Name more hardcoded regs/vals 2018-11-10 14:11:42 +02:00
Kostas Missos
67a470921a Add PWM backlight support + options
- No eye blasting backlight
- Option to choose the prefered brightness
- Smooths transitions
2018-09-19 00:01:42 +03:00
Kostas Missos
fdd94ffd2b General bugfixes + hardcoded name replacement 2018-09-18 23:38:54 +03:00
Kostas Missos
7e876388b4 Bugfixes
- Fixed partial dumping filename/bar position
- Add return for menu function handler
- More files to bootloader folder
2018-08-21 04:26:14 +03:00
Kostas Missos
e5abdd938e Refactor ALL the things + enable LTO 2018-08-13 11:58:24 +03:00
Renamed from ipl/clock.h (Browse further)