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17 commits

Author SHA1 Message Date
CTCaer
1d69809022 sdram: Allow killing ram clock source if desired 2020-04-30 03:39:18 +03:00
CTCaer
093f14923c sdram: Document cfg and use vendor patches 2020-04-30 03:37:40 +03:00
CTCaer
ecb616e411 sdram: Add MR read request 2020-04-30 03:27:39 +03:00
CTCaer
f5040f1e41 Update and add missing copyrights
Probably more need to change.
2020-03-14 09:24:24 +02:00
CTCaer
03a8a11933 Small fixes and changes
- Allow printing of more log on HOS boot when LOGS are OFF.
- A small name refactoring
- Add battery warning symbol when battery < 3200mV
2020-03-03 04:11:13 +02:00
CTCaer
f256bd5909 Move all I/DRAM addresses into a memory map
Many addresses were moved around to pack the memory usage!
2019-12-08 02:23:03 +02:00
CTCaer
0b1eebefe1 Small refactor and bugfixes 2019-12-04 21:31:39 +02:00
CTCaer
d1e50c558e sdram: Refactor and fix some bugs in init 2019-12-04 18:53:36 +02:00
CTCaer
95a6f2b763 sdram: Support fully burnt ODM fuses 2019-09-12 23:21:12 +03:00
Kostas Missos
718e502983 Add more register names + refactoring 2019-09-09 16:56:37 +03:00
Kostas Missos
ec890c7c97 [PMIC] Refactoring 2019-02-16 01:23:14 +02:00
Kostas Missos
2f37811aba Normalize brom patches & add sd autocalib fallback 2019-02-12 00:40:40 +02:00
Kostas Missos
4ae42c3a9d Small fixes and whitespace
Additionally make info functions smaller and show available fuses.
2019-02-12 00:34:35 +02:00
Kostas Missos
e105634b0d Proper warmboot exploit impl and documentation
Side effect:
Fixed a bug where the dumped patched bootrom had the warmboot exploit patch

Co-Authored-By: Balázs Triszka <balika011@gmail.com>
2018-12-17 21:10:13 +02:00
Kostas Missos
267a04c4ac Fix HDCP + some bugfixes
Thanks @hexkyz for taking the time to recheck for the missing 6.x changes
2018-11-20 21:32:54 +02:00
Kostas Missos
fdd94ffd2b General bugfixes + hardcoded name replacement 2018-09-18 23:38:54 +03:00
Kostas Missos
e5abdd938e Refactor ALL the things + enable LTO 2018-08-13 11:58:24 +03:00
Renamed from ipl/sdram.c (Browse further)