mirrors/hekate
1
0
Fork 0
mirror of https://github.com/CTCaer/hekate.git synced 2024-11-23 02:16:41 +00:00
Code Issues Releases Activity
1642 commits 2 branches 75 tags 6.7 MiB
Commit graph

38 commits

Author SHA1 Message Date
CTCaer
72f980d0f4 bdk: display: fully streamline dc/win setup 
As explained before, Nvidia just grabbed the whole dynamic init and made arrays
of it, without actually optimizing it.
The second part of the streamline aims to fully de-duplicate that.
- Completely remove all already set registers for DC/DISP/WIN.
- Do not touch other windows when a specific window is setup.
- Init Window D also together with A/B/C since code is made for DISPA.
- Add missing increase for syncpt 1.
 2024-06-02 08:22:20 +03:00
CTCaer
b3be7e7a41 bdk: display: use the same HS exit threshold 
No need to use minimum on T210.
Use the same byte clocks as T210B01 to simplify init.
 2024-06-02 08:11:22 +03:00
CTCaer
26c6c6372d bdk: display: rename window setup arrays 
Add window number info and remove the fb naming
 2024-06-02 08:05:50 +03:00
CTCaer
28eb3f4bcd bdk: display: deduplicate array size macro 2024-06-02 08:02:44 +03:00
CTCaer
4bc0a0591c bdk: display: wait 2us for bl pwm config to take 
Fixes the tiny blink showing up while pwm is still at max.
 2024-05-19 10:15:52 +03:00
CTCaer
e8d6516f43 bdk: display: use basic profile for OLED 
That's the one with the accurate sRGB colors.
Anything else is over saturated.
 2024-04-25 04:38:57 +03:00
CTCaer
a6727f6e32 bdk: display: update active regs on vsync for WinD 
Doing that on hsync can cause issues on disable without actually syncing to it.
 2024-04-25 04:38:04 +03:00
CTCaer
9ba7c44b89 bdk: clock: use real source clock dividers 
Use CLK_SRC_DIV macro in order to have the actual divider showing.
 2024-03-13 02:01:01 +02:00
CTCaer
09dfcfc57d bdk: display: deduplicate interrupt code 2023-12-25 02:40:38 +02:00
CTCaer
27ae312227 bdk: minor naming edits 2023-03-31 09:11:55 +03:00
CTCaer
9a98c1afb9 bdk: stylistic corrections 
And update copyrights
 2023-02-11 23:46:38 +02:00
CTCaer
5bb9a244ea bdk: utilize new gpio functions 2023-02-11 23:08:32 +02:00
CTCaer
cfbfe403c6 bdk: di: wait 8ms before setting window for vic 2022-12-22 12:32:05 +02:00
CTCaer
a1fde0d9b6 bdk: display: disable LCD DVDD on display deinit 2022-12-19 05:16:35 +02:00
CTCaer
d0b22bf374 bdk: manage host1x only in hw init 2022-12-19 05:14:39 +02:00
CTCaer
9d889e2c3e bdk: Add driver for VIC 
VIC is a HW engine that allows for frame/texture buffer manipulation.
 2022-10-11 06:41:38 +03:00
CTCaer
44b429d5cd bdk: display: Name panel 1040 to Sharp LQ055T1SW10 2022-10-11 03:45:49 +03:00
CTCaer
70523e404f bdk: whitespace refactor 2022-07-11 22:10:11 +03:00
CTCaer
b0c0a86108 bdk: migrate timers/sleeps to timer driver 2022-06-27 10:22:19 +03:00
CTCaer
331f1926d1 bdk: display: remove unneeded pinmuxing on Aula 2022-05-16 10:16:24 +03:00
CTCaer
450d95e573 bdk: di: correct samsung backlight set 
Now that vblank writes are fixed we can return to proper backlight set.

Additionally, account for the pwm smoothing when backlight is turned off. That's to avoid visible green tint glitches when display is also turned off.
 2022-05-08 04:53:13 +03:00
CTCaer
969a49edba bdk: di: reselect winA when done with winD config 2022-05-08 04:49:28 +03:00
CTCaer
9908eb8bb3 bdk: di: samsung panel: better init 
- Set display color profile to natural (it's still vivid but not overblown.)
- Enable PWM slope and set it to 6 frames in order to have smooth backlight transitions
 2022-05-08 04:48:55 +03:00
CTCaer
b9f40fed7a bdk: di: move plld setup code out of display obj 2022-05-08 04:41:05 +03:00
CTCaer
6ae4904c8f bdk: di: make dsi normal/vblank writes more robust 2022-05-08 04:36:20 +03:00
CTCaer
dd2bb0f555 bdk: di: refractor configs 2022-05-08 04:34:44 +03:00
CTCaer
0b8cdaf0ea bdk: di: split normal and vblank dsi reads 
And also make vblank reads more robust
 2022-05-08 04:23:31 +03:00
CTCaer
7bb8b1da62 di: restore window config wait for inv pitch and block linear 2022-01-29 01:26:00 +02:00
CTCaer
4628ee6dc5 bdk: di: window fb changes 
- Get fb address from in window regs
- Remove 2 frames wait
 2022-01-20 12:12:19 +02:00
CTCaer
3bb46c6470 bdk: di: allocate fifo buffer once 2022-01-20 12:09:29 +02:00
CTCaer
808da1bce0 bdk: di: adjust OLED panel brightness curve 
The Samsung AMOLED panel least legible backlight is at a high duty (45 / 255).
Change the linear curve to a more appropriate one.
 2021-10-15 16:16:24 +03:00
CTCaer
681182540e bdk: di: add model name for the samsung panel 2021-10-15 16:07:18 +03:00
CTCaer
bf89d9b841 display: Add Aula panel support 2021-08-28 16:38:42 +03:00
CTCaer
345d36287e display: add pwm duty getter 2021-04-11 09:16:55 +03:00
CTCaer
745ac609d2 max7762x: Update everything to use the improved pmic management 2021-01-04 02:41:15 +02:00
CTCaer
e4bc5c41ce display: Add fifo draining before requesting info 
In case we got loaded from bad chainloader.
Fixes issues with incorrect display ID when fifo has left overs.
 2020-12-28 05:23:33 +02:00
CTCaer
d0d943c9c3 display: Make dsi write buffer bigger 2020-12-28 05:21:21 +02:00
CTCaer
60b629e57f Move display related objects to display parrent 2020-12-28 05:19:23 +02:00
Renamed from bdk/gfx/di.c (Browse further)