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16 commits

Author SHA1 Message Date
CTCaer
644747230c bdk: dram: add FPGA code for 3rd gen micron 2024-02-16 15:54:22 +02:00
CTCaer
b37430dc1d bdk: update copyright year 2024-01-07 12:38:10 +02:00
CTCaer
eff27d92f2 bdk: sdram: update default wpr overrides
Since it's only used in L4T set them to the correct latest reg tool values.

HOS overrides them anyway.
2024-01-06 22:03:54 +02:00
CTCaer
3874840d77 bdk: sdram: update cfg for 8GB erista 2024-01-06 21:59:18 +02:00
CTCaer
74e252aaf2 bdk: sdram: update latest reg tool vpr overrides
Set them to default config and remove them from patching.
2024-01-06 21:58:51 +02:00
CTCaer
a6ec41744b bdk: sdram: refactor patching offsets 2023-12-27 21:04:04 +02:00
CTCaer
913cdee8e8 bdk: sdram: rename 3rd gen t210b01 hynix ram
Confirmed to be a Hynix H54G46CYRBX267 and not a H9HCNNNBKMMLXR-NEI
2023-12-25 03:02:11 +02:00
CTCaer
b9bc35a22e bdk: dram: correct old comments 2023-07-21 18:39:46 +03:00
CTCaer
c2ee6be2f5 bdk: sdram: add Samsung 8GB RAM support for T210
And remove Copper support completely.
2023-06-08 04:16:51 +03:00
CTCaer
b0c0a86108 bdk: migrate timers/sleeps to timer driver 2022-06-27 10:22:19 +03:00
CTCaer
37de367fef bdk: sdram: deduplicate dram configs
Additionally add info about new hynix chip and correct ids 3 and 5 on T210B01 based Switch.
2022-05-08 04:58:36 +03:00
CTCaer
70a06a6cae sdram: add support for missing new dram ids
In preparation of dram chip shortages, add missing new ids that are now confirmed that they will be in mass usage
2021-08-28 16:56:49 +03:00
CTCaer
f4696da0ef sdram: Update names for Aula 2021-01-04 02:45:32 +02:00
CTCaer
29dc122dd4 sdram: Add T210B01 support & new LPDDR4X tables 2020-06-26 18:53:12 +03:00
CTCaer
cabaa6cfb8 Utilize BIT macro everywhere 2020-11-26 01:41:45 +02:00
CTCaer
185526d134 Introducing Bootloader Development Kit (BDK)
BDK will allow developers to use the full collection of drivers,
with limited editing, if any, for making payloads for Nintendo Switch.

Using a single source for everything will also help decoupling
Switch specific code and easily port it to other Tegra X1/X1+ platforms.
And maybe even to lower targets.

Everything is now centrilized into bdk folder.
Every module or project can utilize it by simply including it.

This is just the start and it will continue to improve.
2020-06-14 15:25:21 +03:00
Renamed from bootloader/mem/sdram_config.inl (Browse further)