1
0
Fork 0
mirror of https://github.com/CTCaer/hekate.git synced 2024-12-23 08:32:04 +00:00
Commit graph

390 commits

Author SHA1 Message Date
CTCaer
29e32f09fb bdk: sdmmc: properly identify sdmmc1 clk config
Remove schmitt trigger config from clock pin on sdmmc1 for identifying previous pinmuxing state.
2023-03-31 08:27:48 +03:00
CTCaer
b123571c56 bdk: sdmmc: only allow power raise if SDR50 and up
As per spec.
2023-03-31 08:26:19 +03:00
CTCaer
b7164a629f bdk: sdmmc: allow max power limit to be set
Even if it defaults to 1.44W.
Some cards' firmware maybe be bugged.

The 3.3V regulator on all SKUs allow more than 800mA current anyway.
2023-03-31 08:24:52 +03:00
CTCaer
25be98b7e3 bdk: sdmmc: add UHS DDR50 support
But disable it by default in the auto selection.
2023-03-31 08:23:10 +03:00
CTCaer
76a5facbc3 bdk: clock: rename clock_t to clk_rst_t
To avoid redefines when standard math header is used.
2023-03-31 08:18:45 +03:00
CTCaer
502fc1ed50 bdk: sdmmc: rename ddr100 to the actual HS100 name 2023-03-31 08:15:40 +03:00
CTCaer
5e134ed54b bdk: sdmmc: refactor defines 2023-03-31 08:00:14 +03:00
CTCaer
4cfe5f241e bdk: sdmmc: remove eMMC OC
Additionally, the flag BDK_SDMMC_OC_AND_EXTRA_PRINT is now just BDK_SDMMC_EXTRA_PRINT
2023-03-31 07:55:17 +03:00
CTCaer
9a222e0e49 bdk: sdmmc: rename divisor param to card clock 2023-03-31 07:53:46 +03:00
CTCaer
298893f404 bdk: sdmmc: remove powersave arg from sdmmc init 2023-03-31 07:51:43 +03:00
CTCaer
1ce5bb10f8 bdk: sdmmc: refactor debug prints 2023-03-31 07:49:26 +03:00
CTCaer
107fbd1d24 bdk: gpio: add debounce set function
The debounce time is not per pin but per bank. So software should manage proper time for sibling pins
2023-03-31 07:43:16 +03:00
CTCaer
1edb6583ac bdk: gpio: reorder gpio config
Since there are some bootloaders that mess with the states of some power gpios, reorder gpio configuration for input/output in order to prevent power pin glitches.
2023-03-31 07:41:50 +03:00
CTCaer
d286ee4e9d bdk: sd: only clear inserted when requested
Also rename var to further explain its usage
2023-02-23 01:25:05 +02:00
CTCaer
17cdd5af0d bdk: hwdeinit: restore order of bpmp clock set
Restore order of bpmp clock scale down in deinit, in order to decrease pressure on clock deinits.
2023-02-22 14:48:43 +02:00
CTCaer
55e01ca735 bdk: sd: improve init error handling
- Management of sd init done is now on sd init retry function
 Also manages inserted, since it can set the sd init done to false if failed
- Init will now always check if SD is also initialized, since it doesn't manage it anymore. Because of that, mounting is no longer forced, but checked first.
- Unmount/End will now always set the sd as unmounted, since no data residue is expected after the fact

The above will improve handling of faulty SD cards or faulty SD readers.
2023-02-22 13:19:12 +02:00
CTCaer
c279fa2521 bdk: max77621: ckkadv is basically an enum 2023-02-22 13:00:36 +02:00
CTCaer
9a98c1afb9 bdk: stylistic corrections
And update copyrights
2023-02-11 23:46:38 +02:00
CTCaer
72abe60a3b bdk: hw init: remove support for broken hwinits
It's 2023 already.
2023-02-11 23:19:56 +02:00
CTCaer
ee682fdf24 bdk: l4t: minerva: don't rely on UB 2023-02-11 23:17:27 +02:00
CTCaer
42859a2373 bdk: usb: ums: print errors when sdmmc init fails 2023-02-11 23:16:37 +02:00
CTCaer
22bdd0e0ff bdk: sdmmc: remove unused power limits
Also name some magic numbers
2023-02-11 23:15:28 +02:00
CTCaer
114abba815 bdk: hw init: do not touch audio clocks on t210b01 2023-02-11 23:13:41 +02:00
CTCaer
ec8c04db8a bdk: bpmp: add 563MHz clock for worst binnings 2023-02-11 23:12:14 +02:00
CTCaer
4d7eb6a647 bdk: clock: improve pllc deinit 2023-02-11 23:11:24 +02:00
CTCaer
fd3cf1b7f8 bdk: reg-5v: remove X3 pin
X3 is vbus enable on mariko.
2023-02-11 23:10:43 +02:00
CTCaer
47f0734ba0 bdk: display: add more oled color mode info 2023-02-11 23:09:38 +02:00
CTCaer
5bb9a244ea bdk: utilize new gpio functions 2023-02-11 23:08:32 +02:00
CTCaer
05b5e4f297 bdk: gpio: add simple gpio direction functions 2023-02-11 22:55:22 +02:00
CTCaer
4e15e034b8 bdk: sdram: remove (lp)ddr2/3 support 2023-02-11 22:44:31 +02:00
CTCaer
ee3fc499cd bdk: bm92t36: add sanity checks
If bm92t i2c comms are broken, it can hang hekate. So sanitize buffer and max profile print supported.
2023-02-11 22:40:47 +02:00
CTCaer
cfbfe403c6 bdk: di: wait 8ms before setting window for vic 2022-12-22 12:32:05 +02:00
CTCaer
50dd458cfd bdk: ums: use emmc_end instead of sdmmc_storage_end 2022-12-20 16:55:16 +02:00
CTCaer
0b1bb521d8 bdk: ini: add l4t key parsing 2022-12-19 05:38:03 +02:00
CTCaer
0e1eece04f bdk: hw-init: remove charger forced enable
Anything that doesn't manage it properly should fix itself.
(Like for example disabling charging on sleep or something. They should use the gpio equivalent.)
2022-12-19 05:35:04 +02:00
CTCaer
c9ab6352f6 bdk: rtc: add T210B01 R2P 2022-12-19 05:30:23 +02:00
CTCaer
09ca75dd8c bdk: max77812: exit if RAM reg and not 211 phase 2022-12-19 05:28:35 +02:00
CTCaer
560f077196 bdk: sdram: rename new dram chips 2022-12-19 05:25:26 +02:00
CTCaer
4d823d5909 bdk: slight refactor 2022-12-19 05:22:55 +02:00
CTCaer
a1fde0d9b6 bdk: display: disable LCD DVDD on display deinit 2022-12-19 05:16:35 +02:00
CTCaer
d0b22bf374 bdk: manage host1x only in hw init 2022-12-19 05:14:39 +02:00
CTCaer
6257d20db9 bdk: emmc: add emmc_set_partition
Additionally, add SDMMC index info to errors.
2022-12-19 04:53:50 +02:00
CTCaer
c0cc9c9f4f bdk: vic: ease stress to APB when enabling VIC clk 2022-10-13 00:16:08 +03:00
CTCaer
fe0bd89c4c bdk: pmc: extend pmc scratch locker 2022-10-11 14:41:42 +03:00
CTCaer
f534d5e316 bdk: i2c: fix send packet mode 2022-10-11 14:40:58 +03:00
CTCaer
2ea595e98d bdk: sdram: add new dram ids/configs
On T210B01 dram ids 7 and 16 got removed.
29 to 34 were added.

Additionally, remove all deprecated and unused dram id enums.
2022-10-11 10:38:43 +03:00
CTCaer
1a8075669d bdk: lvgl: allow theme to take a bg color value 2022-10-11 08:22:48 +03:00
CTCaer
9d889e2c3e bdk: Add driver for VIC
VIC is a HW engine that allows for frame/texture buffer manipulation.
2022-10-11 06:41:38 +03:00
CTCaer
bfad719fcd bdk: small refactor 2022-10-11 06:16:38 +03:00
CTCaer
07695196cb bdk: emmc: utilize emmc_end 2022-10-11 04:12:04 +03:00
CTCaer
8bbe403e41 bdk: util: replace strtol/atoi w/ custom versions
To get rid of reentrancy baggage (which is not needed) and save binary space
2022-10-11 04:11:21 +03:00
CTCaer
d08fac5a08 bdk: xusb: improve clock deinit
Allows L4T to use XUSB on T210B01 after a UMS usage.
T210 somehow was fine.
2022-10-11 04:07:24 +03:00
CTCaer
197ce4c76f bdk: sdmmc: timing changes
- Correct HS102 naming to DDR100
- Fix clock for DDR50 (even if it's unused)
2022-10-11 04:05:12 +03:00
CTCaer
eaa25114ad bdk: lvgl: do not do unneeded invalidations
A bug was fixed that was causing full parent object invalidations when tapping into a window.

Now if the object is already on top the invalidation is skipped and the whole rerender/draw is skipped, saving valuable cpu time.
2022-10-11 04:00:41 +03:00
CTCaer
0b2c2aa564 bdk: regulator 5V: improve management per SKU 2022-10-11 03:57:17 +03:00
CTCaer
2aa251c44f bdk: max77812: uncomment RAM regulator 2022-10-11 03:53:17 +03:00
CTCaer
c52c11e7bc bdk: mem: improve emc MRR reading 2022-10-11 03:51:12 +03:00
CTCaer
ff5ee9758d bdk: joycon: refactor some structs and comments 2022-10-11 03:49:18 +03:00
CTCaer
44b429d5cd bdk: display: Name panel 1040 to Sharp LQ055T1SW10 2022-10-11 03:45:49 +03:00
CTCaer
b891657fb6 bdk: tsec: fix regression on HOS 6.2.0 not booting
With the latest BDK changes on enabling always on AHB redirect with a compile time flag, TSEC fw boot was regressed because it needs it off.

Always disable redirect and if the flag is enabled, enable it on exit.
2022-07-11 22:28:09 +03:00
CTCaer
801ebd3543 bdk: xusb: fully clear device mode ctrl register on deinit 2022-07-11 22:13:13 +03:00
CTCaer
d259d6f6d6 bdk: watchdog: clear timer interrupt also in handling 2022-07-11 22:10:41 +03:00
CTCaer
70523e404f bdk: whitespace refactor 2022-07-11 22:10:11 +03:00
CTCaer
b787053c2d bdk: joycon: fixup hori pads
For Hori game pads:
- Restore the no power down fix
- Revert RTS signal back to active high
2022-07-01 13:47:41 +03:00
CTCaer
e921d8f51c bdk: update memory map with more used addresses 2022-06-29 12:13:04 +03:00
CTCaer
57c8fd1f8c bdk: fiq: watchdog handling
`BDK_WATCHDOG_FIQ_ENABLE` enables watchdog handling.
`BDK_RESTART_BL_ON_WDT` causes a reload of bootloader on FIQ

These 2 are useful when wanting to detect and handle hangs.
2022-06-29 12:12:03 +03:00
CTCaer
d38ddad873 bdk: display: correct night mode value 2022-06-27 10:27:18 +03:00
CTCaer
b0c0a86108 bdk: migrate timers/sleeps to timer driver 2022-06-27 10:22:19 +03:00
CTCaer
061e10152f bdk: timer: add timer/watchdog driver 2022-06-27 10:20:25 +03:00
CTCaer
b65b2d7f71 bdk: se: do not use heap for linked lists 2022-06-27 09:14:43 +03:00
CTCaer
50886382bf bdk: list: add LIST_FOREACH_INVERSE and LIST_FOREACH_ENTRY_INVERSE 2022-06-25 05:59:53 +03:00
CTCaer
2378bf2863 bdk: ini: simplify kv free 2022-06-25 05:56:11 +03:00
CTCaer
e5ddac5211 bdk: sdmmc: rename current limit to power limit 2022-06-25 05:53:04 +03:00
CTCaer
489e222aac bdk: sdmmc: expose csd/scr functions 2022-06-25 05:48:54 +03:00
CTCaer
16af97c79a uart: rename print to printf 2022-06-25 05:42:42 +03:00
CTCaer
bdb8f6d352 ccplex: name some flow control values 2022-06-25 05:42:19 +03:00
CTCaer
258a343e21 bdk: usb: support deconfiguration of endpoints
TODO: Signal that to userspace and manage it.
2022-06-14 18:48:21 +03:00
CTCaer
f6c9e636d1 bdk: usb: improve USB2/XUSB power down
TODO: add more power downs on XUSB stack
2022-06-14 18:46:46 +03:00
CTCaer
605f270f98 bdk: usb: fix a race condition in USB2 stack
When RAM is slow (no training), it's possible to have the stack failing to negotiate configuration successfully.

The race condition is caused by not flushing cache before sending a configuration packet reply.
Although, cache is write-through, this needs to happen.
2022-06-14 18:41:33 +03:00
CTCaer
c77c741c07 bdk: sdmmc: correct lower speed mode checks
Both bus widths of 8 and 4 should be checked for HS200 support and host type support, instead of giving 8-bit bus width a free pass.
2022-05-26 03:04:27 +03:00
CTCaer
bf00c79edb bdk: ini: add ini free
Additionally, fix a bug where a list could not be initialized if section type is comment or caption.
2022-05-19 15:03:00 +03:00
CTCaer
429074293a bdk: sprintf: no support for lower case hex and base that is not 10/16 2022-05-19 15:01:10 +03:00
CTCaer
2c768db542 bdk: heap: add nodes info 2022-05-19 14:53:02 +03:00
CTCaer
889317da58 bdk: sdmmc: add missing sd block size define 2022-05-16 13:34:36 +03:00
CTCaer
e09710e3eb bdk: fatfs: mkfs alignment changes
- Default data alignment is now 1MB **when it's not set**
- Default volume alignment is now based on data alignment and not hardcoded to 16MB.
- Change max allowed alignment to 64MB.

The above changes allow selecting alignments for volume and data between 1MB and 64MB.
(From the previous 1 to 16MB for data and 16MB for volume).
2022-05-16 13:33:38 +03:00
CTCaer
e9587a325c bdk: fuse: add ipatch support for T210B01 2022-05-16 13:05:12 +03:00
CTCaer
331f1926d1 bdk: display: remove unneeded pinmuxing on Aula 2022-05-16 10:16:24 +03:00
CTCaer
87fe374b3b bdk: uart: use 2 STOP bits based on baudrate 2022-05-14 12:25:02 +03:00
CTCaer
b56e788d12 bdk: pinmux: more proper uart pinmuxing 2022-05-14 12:20:57 +03:00
CTCaer
9e613a7600 bdk: hwinit: simplify uart debug port paths 2022-05-13 03:56:59 +03:00
CTCaer
b6384d5da5 bdk: utils: Set format attribute for s_printf
This allows the custom sprintf to be recognized as printf by gcc and effectively doing format checking.

NOTE: 64bit formatting is not supported for now, even if gcc asks to be set.
2022-05-12 16:40:34 +03:00
CTCaer
54b054c940 bdk: usb: add Sio support to hid gadget 2022-05-09 06:10:49 +03:00
CTCaer
f31170bb51 bdk: joycon: add Sio support (for Hoag) 2022-05-09 06:09:06 +03:00
CTCaer
f452d916c9 bdk: clock: add ext peripheral clock control 2022-05-09 06:08:39 +03:00
CTCaer
47d06d0e8a bdk: joycon: use flow control to improve packet integrity 2022-05-09 05:55:06 +03:00
CTCaer
2aed1b3b83 bdk: joycon: add 3 mbaud support and full init
Additionally use states for proper init
2022-05-09 05:48:10 +03:00
CTCaer
12aac3a0fc bdk: clock: add 3 megabaud support for UART 2022-05-09 05:47:08 +03:00
CTCaer
833a115eb2 bdk: joycon: improve and streamline jc detect 2022-05-09 05:39:45 +03:00
CTCaer
9f30c51bd1 bdk: joycon: refactor driver 2022-05-09 05:32:32 +03:00
CTCaer
f7bf4af3ec bdk: uart: refactor and add new functionality
- Allow to set CTS/RTS mode (only specific combos supported for now)
- Support the above modes in receiving
- Set 2 stop bits to decreases errors on high baudrates
2022-05-08 05:45:16 +03:00