CTCaer
|
5e6a7c486b
|
bdk: btn: enable HOME button as input
|
2022-01-16 01:05:42 +02:00 |
|
CTCaer
|
1a9c6bf983
|
bdk: correct reg init as per TRM
|
2022-01-16 01:04:52 +02:00 |
|
CTCaer
|
70504c295e
|
bdk: various functionality independent changes
|
2022-01-16 01:03:24 +02:00 |
|
CTCaer
|
a5cd962f99
|
bdk: add global header
|
2022-01-15 23:58:27 +02:00 |
|
CTCaer
|
c801ef8dda
|
bdk: use size defines where applicable
|
2021-10-01 15:03:18 +03:00 |
|
CTCaer
|
a1910156d8
|
bdk: hwinit: save boot reason for later usage
|
2021-10-01 14:32:42 +03:00 |
|
CTCaer
|
bcec028b0f
|
clock: update device frequency getter function
- Add missing write commits
- Remove hardcoded values
|
2021-09-17 23:16:43 +03:00 |
|
CTCaer
|
8f9d52aa89
|
clock: move pllx enable to clock object
|
2021-09-17 23:13:53 +03:00 |
|
CTCaer
|
e9edcfeeb0
|
bdk: remove all references and defines to sept
|
2021-08-28 17:10:21 +03:00 |
|
CTCaer
|
70a06a6cae
|
sdram: add support for missing new dram ids
In preparation of dram chip shortages, add missing new ids that are now confirmed that they will be in mass usage
|
2021-08-28 16:56:49 +03:00 |
|
CTCaer
|
7c72c9777a
|
fuse/hwinit: move automatic SBK set into fuse
|
2021-08-28 16:46:15 +03:00 |
|
CTCaer
|
73df5e6743
|
fuse: add nx aula hw type
|
2021-08-28 16:44:16 +03:00 |
|
CTCaer
|
ce6926c36c
|
fuse: remove fuse counting, bit count will be used instead
|
2021-06-08 05:53:31 +03:00 |
|
CTCaer
|
c29db97f73
|
hwinit/joycon: move uart clock deinits to joycon driver
|
2021-05-11 10:24:48 +03:00 |
|
CTCaer
|
d7ce2a81db
|
bpmp: return previous fid when setting a new one
|
2021-05-11 09:21:12 +03:00 |
|
CTCaer
|
28008ac7ac
|
hwinit: add seamless display (L4T Linux/Android)
Initial support is for coreboot based preloading.
|
2021-04-11 09:18:55 +03:00 |
|
CTCaer
|
513f77a2ad
|
uart: use proper interrupt decoding
|
2021-03-17 08:51:49 +02:00 |
|
CTCaer
|
a7bf8bf118
|
se: Refactor with proper names
Additionally fix some bugs in rsa access control
|
2021-02-06 02:55:58 +02:00 |
|
CTCaer
|
8fc5267110
|
tmp451: Show correct temperature for T210B01
The thermal measurement substrate transistor was changed in Mariko SoCs.
This ensures that it's properly offset by -12.5 °C.
|
2021-01-14 17:58:23 +02:00 |
|
CTCaer
|
c6c396ce2a
|
reg5V: Manage battery source based on charger status
|
2021-01-11 21:30:59 +02:00 |
|
CTCaer
|
1f37b96359
|
coreboot mitigation: Reinstate SD controller power
|
2021-01-04 19:03:50 +02:00 |
|
CTCaer
|
83ab79c51e
|
fuse: Return the proper dram id when raw is requested
|
2021-01-04 02:41:55 +02:00 |
|
CTCaer
|
745ac609d2
|
max7762x: Update everything to use the improved pmic management
|
2021-01-04 02:41:15 +02:00 |
|
CTCaer
|
60b629e57f
|
Move display related objects to display parrent
|
2020-12-28 05:19:23 +02:00 |
|
CTCaer
|
11ca6caf5f
|
clock: Add more defines and simplify some logic
|
2020-12-26 17:28:08 +02:00 |
|
CTCaer
|
15afdf53e4
|
clock: Add module actual frequency getter
|
2020-12-26 17:25:23 +02:00 |
|
CTCaer
|
d15f958b48
|
irq: Disable irq if not handled.
|
2020-12-26 17:22:56 +02:00 |
|
CTCaer
|
5fd3bdede7
|
pmc: Add defines for power rails
|
2020-12-26 17:20:26 +02:00 |
|
CTCaer
|
e2dd218f33
|
pmc: Add latest pmc secure scratch lock
|
2020-12-26 16:48:00 +02:00 |
|
CTCaer
|
2628044ba8
|
fuse: Move more parsing into its specific object
|
2020-12-26 16:34:12 +02:00 |
|
CTCaer
|
b6ec217484
|
exo: Support uart logging
This can be enabled via compile time flags or exosphere.ini.
Compile time flags override exosphere.ini
|
2020-12-11 18:14:00 +02:00 |
|
CTCaer
|
5b8fb9fb6b
|
Various refactoring and addition of comments
|
2020-12-11 17:25:59 +02:00 |
|
CTCaer
|
8249d9e1a2
|
se: Ensure aligned key/iv/ctr/hash copy
|
2020-12-05 20:39:17 +02:00 |
|
CTCaer
|
c13eabcde8
|
sdmmc: Add T210B01 support
The driver was working before this, but adding the changes provides a proper and better sdmmc controller inner state.
|
2020-12-02 02:07:15 +02:00 |
|
CTCaer
|
a1188505e8
|
usb: Add XUSB support mainly for T210B01
|
2020-12-02 01:13:52 +02:00 |
|
CTCaer
|
5ffbbf40a5
|
hos: Add Mariko keygen
|
2020-07-04 21:13:25 +03:00 |
|
CTCaer
|
a36fec5696
|
clock: Lock clock to always enabled for SE in T210B01
|
2020-07-04 21:07:25 +03:00 |
|
CTCaer
|
8d2230dc51
|
fuse: Correct fuse array size for T210B01
|
2020-07-04 21:04:20 +03:00 |
|
CTCaer
|
ccaf49bece
|
display: Add T210B01 support
|
2020-06-26 22:29:52 +03:00 |
|
CTCaer
|
147fed39c8
|
ccplex: Add regulator for T210B01
|
2020-06-26 19:02:37 +03:00 |
|
CTCaer
|
293c47774d
|
fuse: Add NX hw type getter
|
2020-06-26 18:45:21 +03:00 |
|
CTCaer
|
795ed8aadc
|
hwinit: Add T210B01 support
|
2020-06-26 18:42:31 +03:00 |
|
CTCaer
|
cabaa6cfb8
|
Utilize BIT macro everywhere
|
2020-11-26 01:41:45 +02:00 |
|
CTCaer
|
ab7a81081c
|
t210: Refactor AHB Gizmo registers
|
2020-11-15 14:46:42 +02:00 |
|
CTCaer
|
0b314d7f21
|
clock: Move UTMIPLL init from USB to clock
|
2020-11-15 14:43:36 +02:00 |
|
CTCaer
|
8305058cf5
|
clock: Move PLLU init/deinit from USB to clock
|
2020-11-15 14:42:01 +02:00 |
|
CTCaer
|
669e42960c
|
Utilize ARRAY_SIZE macro
|
2020-11-15 13:56:45 +02:00 |
|
CTCaer
|
68d57861cd
|
Add missing guard from some macros
Guard them for future usage, as none of these macros had a non-preset variable used with them yet.
|
2020-11-15 13:39:27 +02:00 |
|
CTCaer
|
ce156ab4e7
|
hos: Automate some eks and bis checks
|
2020-10-20 11:53:28 +03:00 |
|
CTCaer
|
cb471162d2
|
i2c: Fix packet mode
|
2020-10-20 10:37:33 +03:00 |
|