mirrors/hekate
1
0
Fork 0
mirror of https://github.com/CTCaer/hekate.git synced 2024-11-10 20:36:40 +00:00
Code Issues Releases Activity
1672 commits 2 branches 75 tags 6.7 MiB
Commit graph

61 commits

Author SHA1 Message Date
CTCaer
4c5cc6d567 bdk: display: small refactor 2024-07-02 17:52:12 +03:00
CTCaer
4a24fe0b35 bdk: display: add useful functions 
- Window disable
- Window framebuffer address set
- Window framebuffer move to new address
 2024-06-06 06:27:30 +03:00
CTCaer
14c482ddce bdk: display: remove max77620 gpio 7 enable 
It is actually not used at all.
So do not configure it to save power.
 2024-06-05 15:20:27 +03:00
CTCaer
39c614a3ab bdk: hwinit: move sd2 to hw init 
SD2 powers LDO0/1/8 on T210B01 so there's no need to be in display init.
Also there's not need to power it down first so configure it in one go.
 2024-06-05 01:33:15 +03:00
CTCaer
7652d9cdb1 bdk: display: use mipi cal sw war on T210 also 
As per Nvidia, the pad brick separates clock and data terminations.
This necessitates doing the calibration twice.

Nvidia/Nintendo probably never updated that part on T210 since it's from around
2015/2016. T210B01 is based on 2017 codebase so it has it.
HOS (nvservices, not boot) is probably updated to also do that.
If not, then they should fix it.

There are 0 known issue reports with that on T210, but well.
 2024-06-05 01:11:04 +03:00
CTCaer
48ef1826e9 bdk: display: rename functions 
display_init_framebuffer_pitch -> display_init_window_a_pitch
display_init_framebuffer_pitch_vic -> display_init_window_a_pitch_vic
display_init_framebuffer_pitch_inv -> display_init_window_a_pitch_inv
display_init_framebuffer_block -> display_init_window_a_block
display_init_framebuffer_log -> display_init_window_d_console
display_activate_console -> display_window_d_console_enable
display_deactivate_console -> display_window_d_console_disable
display_init_cursor -> display_cursor_init
display_set_pos_cursor -> display_cursor_set_pos
display_deinit_cursor -> display_cursor_deinit
 2024-06-05 01:00:58 +03:00
CTCaer
4fef1890aa bdk: rename exec_cfg to reg_write_array 
And cfg_op_t to reg_cfg_t.
 2024-06-05 00:49:15 +03:00
CTCaer
320b91a767 bdk: display: return duty for oled panel properly 
For display_get_backlight_brightness.
 2024-06-02 08:23:58 +03:00
CTCaer
c5f6837c35 bdk: display: wait 1 frame after display off cmd 2024-06-02 08:23:13 +03:00
CTCaer
72f980d0f4 bdk: display: fully streamline dc/win setup 
As explained before, Nvidia just grabbed the whole dynamic init and made arrays
of it, without actually optimizing it.
The second part of the streamline aims to fully de-duplicate that.
- Completely remove all already set registers for DC/DISP/WIN.
- Do not touch other windows when a specific window is setup.
- Init Window D also together with A/B/C since code is made for DISPA.
- Add missing increase for syncpt 1.
 2024-06-02 08:22:20 +03:00
CTCaer
b3be7e7a41 bdk: display: use the same HS exit threshold 
No need to use minimum on T210.
Use the same byte clocks as T210B01 to simplify init.
 2024-06-02 08:11:22 +03:00
CTCaer
26c6c6372d bdk: display: rename window setup arrays 
Add window number info and remove the fb naming
 2024-06-02 08:05:50 +03:00
CTCaer
28eb3f4bcd bdk: display: deduplicate array size macro 2024-06-02 08:02:44 +03:00
CTCaer
7a74761da9 bdk: bpmp: add and use bpmp_clk_rate_relaxed 2024-06-02 06:51:06 +03:00
CTCaer
547a3542ee bdk: display: add more defines 2024-05-19 10:16:52 +03:00
CTCaer
4bc0a0591c bdk: display: wait 2us for bl pwm config to take 
Fixes the tiny blink showing up while pwm is still at max.
 2024-05-19 10:15:52 +03:00
CTCaer
96efa7a002 bdk: vic: add support for P8 and R5G5B5 2024-04-25 04:44:22 +03:00
CTCaer
d92906db5e bdk: display: correct some reg names and add more 2024-04-25 04:44:08 +03:00
CTCaer
e8d6516f43 bdk: display: use basic profile for OLED 
That's the one with the accurate sRGB colors.
Anything else is over saturated.
 2024-04-25 04:38:57 +03:00
CTCaer
a6727f6e32 bdk: display: update active regs on vsync for WinD 
Doing that on hsync can cause issues on disable without actually syncing to it.
 2024-04-25 04:38:04 +03:00
CTCaer
42c02e97e8 bdk: display: add 6.2" panel clone 2024-03-29 13:21:53 +02:00
CTCaer
9ba7c44b89 bdk: clock: use real source clock dividers 
Use CLK_SRC_DIV macro in order to have the actual divider showing.
 2024-03-13 02:01:01 +02:00
CTCaer
9ea847578e bdk: display: add another oem clone 2024-02-21 10:40:46 +02:00
CTCaer
bfc6069b2d bdk: display: add OEM panel id 2024-02-14 00:08:06 +02:00
CTCaer
09dfcfc57d bdk: display: deduplicate interrupt code 2023-12-25 02:40:38 +02:00
CTCaer
27ae312227 bdk: minor naming edits 2023-03-31 09:11:55 +03:00
CTCaer
9a98c1afb9 bdk: stylistic corrections 
And update copyrights
 2023-02-11 23:46:38 +02:00
CTCaer
47f0734ba0 bdk: display: add more oled color mode info 2023-02-11 23:09:38 +02:00
CTCaer
5bb9a244ea bdk: utilize new gpio functions 2023-02-11 23:08:32 +02:00
CTCaer
cfbfe403c6 bdk: di: wait 8ms before setting window for vic 2022-12-22 12:32:05 +02:00
CTCaer
a1fde0d9b6 bdk: display: disable LCD DVDD on display deinit 2022-12-19 05:16:35 +02:00
CTCaer
d0b22bf374 bdk: manage host1x only in hw init 2022-12-19 05:14:39 +02:00
CTCaer
c0cc9c9f4f bdk: vic: ease stress to APB when enabling VIC clk 2022-10-13 00:16:08 +03:00
CTCaer
9d889e2c3e bdk: Add driver for VIC 
VIC is a HW engine that allows for frame/texture buffer manipulation.
 2022-10-11 06:41:38 +03:00
CTCaer
44b429d5cd bdk: display: Name panel 1040 to Sharp LQ055T1SW10 2022-10-11 03:45:49 +03:00
CTCaer
70523e404f bdk: whitespace refactor 2022-07-11 22:10:11 +03:00
CTCaer
d38ddad873 bdk: display: correct night mode value 2022-06-27 10:27:18 +03:00
CTCaer
b0c0a86108 bdk: migrate timers/sleeps to timer driver 2022-06-27 10:22:19 +03:00
CTCaer
331f1926d1 bdk: display: remove unneeded pinmuxing on Aula 2022-05-16 10:16:24 +03:00
CTCaer
450d95e573 bdk: di: correct samsung backlight set 
Now that vblank writes are fixed we can return to proper backlight set.

Additionally, account for the pwm smoothing when backlight is turned off. That's to avoid visible green tint glitches when display is also turned off.
 2022-05-08 04:53:13 +03:00
CTCaer
969a49edba bdk: di: reselect winA when done with winD config 2022-05-08 04:49:28 +03:00
CTCaer
9908eb8bb3 bdk: di: samsung panel: better init 
- Set display color profile to natural (it's still vivid but not overblown.)
- Enable PWM slope and set it to 6 frames in order to have smooth backlight transitions
 2022-05-08 04:48:55 +03:00
CTCaer
56dcbb2b23 bdk: di: cleanup configs 
Nintendo or Nvidia copied pasted the dynamic display code into static arrays in order to do the static hw init in bootloader and boot sysmodule.

Ofc that does double the work that is not needed at all, making it suboptimal.

Clean up every single config based on how tegra display interface hw works in order to save up space and make the process a bit faster.
 2022-05-08 04:45:03 +03:00
CTCaer
b9f40fed7a bdk: di: move plld setup code out of display obj 2022-05-08 04:41:05 +03:00
CTCaer
6ae4904c8f bdk: di: make dsi normal/vblank writes more robust 2022-05-08 04:36:20 +03:00
CTCaer
dd2bb0f555 bdk: di: refractor configs 2022-05-08 04:34:44 +03:00
CTCaer
0b8cdaf0ea bdk: di: split normal and vblank dsi reads 
And also make vblank reads more robust
 2022-05-08 04:23:31 +03:00
CTCaer
7bb8b1da62 di: restore window config wait for inv pitch and block linear 2022-01-29 01:26:00 +02:00
CTCaer
4628ee6dc5 bdk: di: window fb changes 
- Get fb address from in window regs
- Remove 2 frames wait
 2022-01-20 12:12:19 +02:00
CTCaer
3bb46c6470 bdk: di: allocate fifo buffer once 2022-01-20 12:09:29 +02:00